Electronic systems and Instrumentation has been interwoven and intertwined into every aspect of daily life such as home appliances, medical gadgets and many more to add. A successful Electronics Instrumentation Engineer is essential for selecting, installing, calibrating, and maintaining instrumentation used in various industries. Electronics Instrumentation Technology is the study of specialized instruments to measure monitoring and control critical processes found in automated industries.   Electronic systems and Instrumentation provides a sound foundation for people wishing to pursue a career in quality of measurement & instrumentation, process & control, robotics or sensor systems, through a diverse range of theoretical skills and practical experience, presented in the context of real applications and design.

The Department of Electronics and Instrumentation, established during 2008 with an intake of 60 students has increased to 120 in the year 2009. The department has highly qualified and dedicated teaching faculty members.

The department has been honored with “Teaching Excellence Awards in Engineering 2014” by the Stanford University UK, British council. The department has produced 36 Anna University rank holders and the students are motivated to present papers in conferences and to publish articles in journals of repute. The EIE graduates are placed in companies like National Instruments, Yokogawa, General Electric, Emerson, Infosys, Wipro, CTS, VVDN technologies, NTT Data, Cap Gemini, L&T Infotech, Honey well, CSC and Accenture.  The students are encouraged to pursue higher studies in India and foreign universities.

The department students are associated with various professional society bodies through which numerous workshops, seminars; guest lectures and SDP’s are organized. Few noteworthy accolades include students representation in the Asian Pacific Countries meet (IEEE) in 2014, student slection to attend IEEE congress in Malaysia and Bangalore.  Department encourages student membership in ISA (International Society of Automation) and ISOI (Instrument Society of India)

The department has signed MoU with the companies like YOKOGOWA, STEINBEIS SOLAR RESEARCH CENTER, SVP Laser Technologies and Vi Micro Systems.  Students are trained frequently in additional areas such as PLC – SCADA, DCS, field instruments, 3D printing, Robotics, Solar based Systems, Matlab, IOT, PCB Design, Aurdino programming and Labview.

VISION

To excel in technical education and research in the field of Electronics and Instrumentation Engineering to attain International Standards.

MISSION

M1: To Nurture creative, alert and adapt students in contriving scholarly project Structures and systems through continuous learning and advancement in the area of Electronics and Instrumentation.

M2: To Produce quality experts through innovative abilities to maintain active linkages with industries and research institutions.

M3: To Develop insightful environment to provoke enduring moral and responsible engineers for upgradation of the society.

M4: To Contribute towards betterment of the society through persistent studies and entrepreneurship by imparting practical and technical skills to graduates for better employability.

PROGRAM EDUCATIONAL OBJECTIVES (PEOS)

PEO1: To prepare the students have successful career in industry and motivate for higher education.

PEO2: To provide strong foundation in basic science and mathematics necessary to formulate, solve and analyze Electronics and Instrumentation problems.

PEO3: To provide good knowledge of Instrumentation systems and basic electronics and their applications in Instrumentation engineering.

PEO4: To provide an opportunity to work in inter disciplinary groups and to promote student awareness for lifelong learning and inculcate professional ethics.

PEO5: To provide necessary foundation on computational platforms and software applications related to the respective field of engineering.

PROGRAM SPECIFIC OUTCOMES (PSO)

PSO 1: To understand the basic concepts in electrical and electronics engineering so as to apply them to various prominent domains like renewable resources, power electronics, electrical drives, embedded systems etc., in the analysis and synthesis of systems.

PSO 2: To solve complex electrical and electronics engineering problems, using effective software tools and hardware prototypes to obtain the optimal solution.

PSO 3: To streamline the students in the right path to achieve greater heights in their career and to enhance the social and environmental awareness about the effective utilization of the available resources to sustain the growth of human kind in the right direction.

  • Transducer and Measurement Lab
  • Industrial Instrumentation Lab
  • Process Control Lab
  • Instrumentation System Design Lab
  • Electronics circuits and Devices lab
  • Microprocessor and Microcontroller Lab
  • Virtual Instrumentation Lab
  • Our department has achieved 12 Anna University ranks from the batch 2012-16
  • Signed MOU with SVP LASER on
  • More than 25 of our students are pursuing M.S in foreign universities like NANYANG TECHNOLOGICAL UNIVERSITY, SINGAPORE, UNIVERSITY OF ILLINOIS, CHICAGO, WARSAW UNIVERSITY OF POLAND, KAUNAS UNIVERSITY OF TECHNOLOGY – LITHUANIA, UNIVERSITY OF WINDSOR – CANADA, STATE UNIVERSITY OF NEW YORK – STONYBROOK, etc.,
  • Conducted 4 Workshops and 2 FDP during the academic year 2016 – 17 in association with ISA and ISOI
  • 4 patents have been filled during the academic year
  • We stand III for securing highest pass percentage in the University Examinations in our college
  • Our student has received a honoree of 1000$ to attend the International IEEE Power and Energy Student Congress held at Malaysia and Bangalore from IEEE, for representing the Asian Pacific Countries in 2016
  • Achieved placement for the eligible students.
  • MEYYAPPAN M.S,SILVESTER STEPHEN S (III YEAR EIE)has won 2000 cash price for the event “Vista mind-wizard of maths quiz” Organised in Kumararani Meena Muthiah College of Arts and Science, Chennai.
  • AHAMED NALIBUDEEN.P.S (II YEAR EIE) has secured second place in “paper presentation” conducted in silicon 2017 organised by Sathyabama University.
  • VARUN KUMAR .R (II YEAR EIE) has secured first position in the event “QUIZ.0” in
    SAMHITA’17 Organised by ANNA UNIVERSITY & MIT,CHENNAI.
  • R.DIVYA (II YEAR EIE) has secured first place has won 3000 cash price for the event
    “EXHIVISION” held during VISION 2017 at College of Engineering Guindy, Anna
    university, Chennai

 

STAFF PUBLICATION DETAIL

S.NOSTUDENT NAME CGPARANKPHOTO
1B.VINODHINI8.8414
2ROJA .R8.82
16
3KAMATCHI G8.7123
4V.SUPRAJA8.7024
5ALAMELU MANGAI M8.6925
6ARCHANA M8.6429
7S.ANGELINE ESTHER DEVAPRIYA 8.6230
8N.NISHALINI8.5042
9OLIVE DINU J 8.4547
10ANISHA RAJAM R
8.5042
11JEEVITHA C 8.4349
12SARANYA N8.4250
S.NONAMEFATHER NAMEPHOTOCOMPANY
1BLESSLIN SHIENED/O Mr. JOHNSON
2EUGENE KINGSLEYS/o Mr.HILBERT SELVARAJ
3HARINID/o Mr. SRINIVASA NARASIMHAN
4PRAMODS/o Mr.NETRA NARAYAN SHARMA
5PRAGATHEESWARANS/o Mr.RAGHUNATH
6UMARANID/o Mr.BAKTHAVATCHALAM
7BHUVANESWARID/o Mr.GANAPATHY P
8BLESSLIN SHIENE D/O Mr. JOHNSON
9DEEPAK SARMA S/o Mr.ELUMALAI D
10GUNALANS/o Mr.SELVAM S
11HARINID/o Mr. SRINIVASA
NARASIMHAN
12JIM ISAAC S/o Mr.DHANARAJ I
13KAVIYAD/o Mr.THIGARAJAN G K
14MONISHA NICKOLAS D/o Mr.NICKOLAS M. M
15RAJAGOPALANS/o Mr.MANIVANNAN/S
16SUGIRTHAD/o Mr.SELVAKUMAR D
17SUPRIYAD/o Mr.SINGARAM.K
18ANTON CHARLES
DOSS
S/o Mr.SAGAYARAJ
19DINESH KUMARS/o Mr.RAM KUMAR
20ELAKKIYAD/O Mr.KUMARESAN
21HEPZIBA LIZZIE D/O Mr.SAGAYARAJ
22MONISHAD/O Mr.JAISANKAR
23PORSELVID/O Mr.BASKAR
24RESHMA K.BD/O Mr.BALACHANDRAN
25SHRI RAGHAVID/O Mr.GANESH
26VIGNESHS/O VIJAYAKUMAR
27ABDUL RAHUMAN S/O BASHEER AHAMED
28ASHWINID/O JAYABALAN

STAFF PUBLICATIONS

  • Sathiyabama and Malarkkan.S, “A Survey on Minimizing Energy Consumption of VLSI Processors Using Multiple Supply Voltages”, International Journal of Computer Science& Information Security.Vol.8, No.9, December 2010, pp.350-355. (ISSN 1947-5500)
  • Sathiyabama and Malarkkan.S, “Energy Consumption Optimization for Basic Arithmetic Circuits with Transistor Sizing Based on Modified Genetic Algorithm”, CIIT International Journal of Programmable Circuits and Systems. Vol: 3. No.12, September2011.pp715-721(ISSN 0974-973X).
  • Sathiyabama and Malarkkan. S, “Analysis and Comparison Dynamic Power Consumption of 8-Bit Multipliers for Low Power Application”, International Journal of Computer applications, Vol .46, No 16, May 2012, pp16-20. (ISSN 0975-8887)
  • Sathiyabama and Malarkkan. S, “Novel Low Power Hybrid Adders Using 90 nm Technology for DSP Applications”, International Journal of Engineering Research and Development Vol .1, Issue 2, May2012, pp29-33. (ISSN2278-067X)
  • Sathiyabama and Malarkkan. S, “Dynamic power reduction in carry save multiplier using multi Vdd technique with single supply level converter”, European Journal of scientific Research Vol .81, Issue 1. (ISSN 1450-216X/1450-202X).
  • Sathiyabama and Raja. J, “Techniques for Glitch power reduction in CMOS VLSI circuits”, International Journal on Intelligent Electronic Systems, Vol.2, No .1, July 2008, PP:75-79. (ISSN 0973-9238)
  • Sathiyabama and, Raja Shailaja, “A Survey of Low Power High Speed Full Adder”, International Journal of Emerging Technology and Advanced Engineering, (ISSN 2250-2459), Volume 2, Issue 9, September 2012.pp 527-532.
  • Sathiyabama (2012), “A Survey of Power Management in Embedded System Using Transistor Sizing”, International Journal of Modern Engineering Research (IJMER) Vol. 2, Issue. 5, Sep.-Oct. 2012 pp-3578-3582(ISSN: 2249-6645)
  • Sathiyabama and Malarkkan., “Analysis and Comparison of Modified 8-Bit Multipliers Using Optimized Adder for Low Power Application, International Journal on electronics, communication and instrumentation research and development.vol 2 issues 1, pp 1-8. ISSN: 2249-684x)
  • Sathiyabama and Malarkkan. “Dynamic power reduction in Hybrid adders based on modified genetic algorithm”, International Journal of Power System Operation and Energy Management (ISSN22314407) Volume 2. Issue 3,4.2013, pp 81-84. (ISSN 0976-5166. 2231-4407
  • Sathiyabama and Malarkkan. S, “Low Power Novel Hybrid Adders for Data Path Circuits in DSP Processor”, Indian journal on Computer science and Engineering, Vol.3, Issue.1, March 2012, PP: 117-124. (ISSN 0976-5166. 2231-3850)
  • Sathiyabama and Malarkkan. S, “Dynamic Power Analysis of Data Path Circuits in Modified DWT Architecture At 65nm Technology”, National Journal on Electronic Sciences and Systems, Vol:3, Issue:1, April 2012, P76-79. (ISSN 0975 – 7325)
  • Sathiyabama and Malarkkan. S, “Dynamic Power Analysis Of Data path operators of DSP using Technology Scaling”, The IUP journal of Tele communications, Vol IV, No.3 August 2012, pp, (printing)
  • Sathiyabama and Malarkkan. S, “Low Power Adders for MAC Unit Using Dual Supply Voltage in DSP Processor”, Proc. International Conference on Solid-State and Integrated Circuit, ICSIC 2012,17-18 March Singapore,vol. 32 pp 67-72.(ISSN 2010-460X)
  • Sathiyabama and Raja.J “Multi VDD Technique for Power Optimized High Performance Multipliers in MAC Unit”, Proc. International Conference on intelligent information Systems and management IISM’2010, 10-12 June, pp 1-4. (ISBN 978-1-4507-2041-0)
  • Sathiyabama and Raja.J, “A Comparative Analysis on Low Power 1-Bit Full Adders Design Using 10 Transistors”, Proc. International Conference on Trends in Intelligent Electronic Systems, TIES-2007,12-14 Nov2007, Vol:II,PP 630-632.
  • Sathiyabama and Neelima, “Analysis and optimization of standard level converter for low power applications”, Proc. International conference on ICAIC 2010, PSG Tech August 2010
  • Sathiyabama and Malarkkan. S, “Dynamic power reduction in hybrid adders using transistor sizing based on Modified Genetic Algorithm”, Proc. International Conference on Electronics and communication Engineering ICECE-2012, 30-June 2012 pp7-11. (ISBN 978-93-81693-80-3)
  • Sathiyabama and Malarkkan. S, “Performance Analysis and Comparison of Level Converters for Multi VDD design in Low Power Applications”, Proc. National Conference on Emerging trends in VLSI, Embedded and Nano Technologies, NC-EVENT 2011, 27-28 January 2011, pp 27-28.
  • Sathiyabama and Malarkkan. S, “New Level Converters for Multi Vdd Design using Single Supply for Low power”, Proc. National Conference on Signal Processing Communications and VLSI Design NCSCV’11, 6 &7 May 2011, pp-36-41.
  • Sathiyabama and Malarkkan. S, “Reduction in Dynamic Power of Adders for DSP using Technology Scaling”, Proc. National Conference on Expanding Horizon in Computer Information Technology, Telecommunication and Electronics, EXECITE2012,20 &21 April 2012, PP 1-5
  • Sathiyabama and Malarkkan,” low power high performance adders using dual supply voltage”, Proc National conference on NCEE. (ISBN 978-1-4507-5679-2)
  • Sathiyabama “PC based PH measurement for wet tanneries”, Proc. National conference on Instrumentation, CSIR, November 2006
  • Sathiyabama and M.Janaki Ran , “ Performance analysis and comparison of xor/xnor modules in submicron technology ”, Proc National conference on signals, systems & security NCSSS 2010,Feb 26-27,2010.
  • Neethu ravinndran and Sathiyabama, “Comparitive study and combined estimation of I/Q imbalance, CFO and channel response for MIMO OFDM systems”, Proc National conference on New Avenues in Sensors and Automation- NASA-12,15 & 16 March 2012
  • Tessy tomy and Sathiyabama, “Optimal Wideband Spectrum Sensing Framework and Roc Curve Determination for Cognitive Radio Systems,”, Proc National conference on New Avenues in Sensors and Automation- NASA-12,15 & 16 March 2012
  • Mariam Sajan and Sathiyabama, “Spectral Efficiency Enhancement with Interference Cancellation for More Than Two Users,” Proc National conference on New Avenues in Sensors and Automation- NASA-12,15 & 16 March 2012
  • Sathiyabama and Rajeswari, “PLC Based Embedded System for Energy Conservation in Automobile Industries,” Proc on National conference AUTOMEET 2011, MIT Anna University
  • C.J.Santhalakshmi, “Fuzzy Logic based visual Cryptography” National Conference on Advance communication and computing techniques on 29th April 2011 at Sri Sairam Engineering College, Chennai
  • C.J.Santhalakshmi and V.Thulasi Bai, “ Automatic Extraction of the missing part of inferior alveolar nerve canal in dental computed tomography by using Finite Element Analysis” on Proc. on National Conference on Expanding Horizon in Computer, Information Technology, Telecommunication, Electrical and Electronics, on 2nd and 3rd April 2013 at Prathyusa Institute of technology in association with IETE, Chennai
  • G.Kalpana and Rajendran presented a paper titled ” Collision free navigation of Mobile Robot using Artificial Intelligence” in the National Conference on NCCCED’13 on 5th April at ARM College of Engineering and Technology
  • G.Kalpana and Rajendran presented a paper titled ”Characterization of Under Water Ambient Noise and Study of De-Noising Techniques for Oceano Graphic Applications” in the National Conference on Emerging trends in VLSI Embedded and Nano Technologies on 27thand 28th June at Sathyabama University

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